SigmanticAI/apex-inference-chip

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An inference chip design that runs a real LLM (Qwen2.5-0.5B) on FPGA — one transformer decoder layer in RTL, every silicon value bit-exact against a golden model. 0.56 tok/s measured, a 140× climb, full evidence trail.

Why this repo matters

Open-source RTL for an LLM inference tile focusing on memory efficiency.
Implements KV cache compression directly in hardware for faster inference.
Verification-first approach ensures bit-exactness against a golden model.

Key Metrics

Stars: 617
Forks: 10
Open Issues: 0
Stars (7d delta): 0
Stars (30d delta): 0

Scores & Metadata

Trend Velocity Score: 0.00
Opportunity Score: 35.00
Confidence Score: 20.00
Language: Python
License: Apache-2.0
First Seen: 2 months ago

Links & Sources

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